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| FDG6318P January 2003 FDG6318P Dual P-Channel, Digital FET General Description These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS. Features * -0.5 A, -20 V. RDS(ON) = 780 m @ VGS = -4.5 V RDS(ON) = 1200 m @ VGS = -2.5 V * Very low level gate drive requirements allowing direct operation in 3V circuits (VGS(th) < 1.5V). * Compact industry standard SC70-6 surface mount package Applications * Battery management S G D D G Pin 1 S 1 or 4 6 or 3 D 5 or 2 G 4 or 1 S G 2 or 5 S D 3 or 6 SC70-6 The pinouts are symmetrical; pin 1 and pin 4 are interchangeable. Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA=25oC unless otherwise noted Parameter Ratings -20 12 (Note 1) Units V V A W C -0.5 -1.8 0.3 -55 to +150 Power Dissipation for Single Operation (Note 1) Operating and Storage Junction Temperature Range Thermal Characteristics RJA Thermal Resistance, Junction-to-Ambient (Note 1) 415 C/W Package Marking and Ordering Information Device Marking .38 Device FDG6318P Reel Size 7'' Tape width 8mm Quantity 3000 units 2003 Fairchild Semiconductor Corporation FDG6318P Rev C (W) FDG6318P Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSS TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = -250 A Min -20 Typ Max Units V Off Characteristics ID = -250 A, Referenced to 25C VDS = -16 V, VGS = 0 V VGS = 12 V, VDS = 0 V ID = -250 A -10 -1 100 mV/C A nA On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, -0.65 -1.2 2 580 980 780 -1.5 V mV/C ID = -250 A, Referenced to 25C VGS = -4.5 V, VGS = -2.5 V, VGS = -4.5 V, VGS = -4.5 V, VDS = -5 V, ID = -0.5 A ID = -0.4 A ID = -0.5 A, TJ=125C VDS = -5 V ID = -0.5 A 780 1200 m ID(on) gFS -1.8 1.1 A S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = -10 V, V GS = 0 V, f = 1.0 MHz VGS = 15 mV, f = 1.0 MHz 83 20 11 12.1 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -10 V, ID = 1 A, VGS = -4.5 V, RGEN = 6 6 12 6 1 12 22 13 3 1.2 ns ns ns ns nC nC nC VDS = -10 V, ID = -0.6 A, VGS = -4.5 V 0.86 0.22 0.25 Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = -0.25 A(Note 2) -0.83 12.6 2.52 -0.25 -1.2 A V ns nC IF = -0.5 A, diF/dt = 100 A/s Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design. RJA = 415C/W when mounted on a minimum pad . 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDG6318P Rev C (W) FDG6318P Typical Characteristics 1.8 -4.5V -ID, DRAIN CURRENT (A) -6.0V 1.2 -2.5V -3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -10.0V -3.5V 1.75 1.5 VGS = -3.5V -4.0V -4.5V 1.25 -5.0V -6.0V 0.6 -2.0V 1 -10.0V 0 0 0.5 1 1.5 2 2.5 3 -VDS, DRAIN-SOURCE VOLTAGE (V) 0.75 0 0.4 0.8 -ID, DRAIN CURRENT (A) 1.2 1.6 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 RDS(ON), ON-RESISTANCE (OHM) 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 o ID = -0.5A VGS = -4.5V ID = -0.25A 1.4 1 TA = 125oC 0.6 TA = 25oC 100 125 0.2 0 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. 1.8 VDS = -5V -ID, DRAIN CURRENT (A) TA = -55oC 1.2 125oC 0.6 25oC -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 VGS = 0V 1 TA = 125oC 0.1 0.01 25oC -55 C o 0.001 0 0.5 1 1.5 2 2.5 3 3.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDG6318P Rev C (W) FDG6318P Typical Characteristics 10 -VGS, GATE-SOURCE VOLTAGE (V) ID = -0.5A 8 VDS = -5V CAPACITANCE (pF) -10V 6 -15V 120 f = 1MHz VGS = 0 V 80 Ciss 4 40 Coss 2 Crss 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 Qg, GATE CHARGE (nC) 0 0 4 8 12 16 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 10 RDS(ON) LIMIT 100s -ID, DRAIN CURRENT (A) 1ms 10ms 100ms 1s 0.1 VGS = -4.5V SINGLE PULSE RJA = 415oC/W TA = 25 C 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) o Figure 8. Capacitance Characteristics. 30 SINGLE PULSE RJA = 415oC/W 24 TA = 25oC POWER (W) 1 18 12 DC 6 0 0.0001 0.001 0.01 0.1 1 10 100 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 415 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1. Transient thermal response will change depending on the circuit board design. FDG6318P Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTa CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER ImpliedDisconnect PACMAN POP ISOPLANAR Power247 LittleFET PowerTrencha MicroFET QFET MicroPak QS MICROWIRE QT Optoelectronics MSX Quiet Series MSXPro RapidConfigure OCX RapidConnect OCXPro SILENT SWITCHERa OPTOLOGICa SMART START OPTOPLANAR SPM Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogica TruTranslation UHC UltraFETa VCX FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I2 |
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